FPGA Accelerator for Gradient Boosting Decision Trees

A decision tree is a well-known machine learning technique. Recently their popularity has increased due to the powerful Gradient Boosting ensemble method that allows gradually increasing accuracy at cost of executing large number trees. In this paper we present an accelerator designed optimize execution these trees while reducing energy consumption. We have implemented it in FPGA for embedded systems, and tested with relevant case-study: pixel classification hyperspectral images. our experiments different images can process same speed which they are generated by sensors. Compared high-performance processor running optimized software, on average design twice as fast consumes 72 times less energy. processor, 30 faster 23